Key points
- Who could serve smaller custom buyers
- Why big DRAM makers may skip small buyers
- A turning point in how DRAM is built
A former Samsung Electronics (삼성전자, 005930) memory executive says demand for custom DRAM could lead to separate companies that design the chips and companies that manufacture them. DRAM is the working memory used in computers and AI servers. Yoo Chang-sik (유창식), a professor at Sungkyunkwan University, made the forecast on October 15 at a semiconductor workshop in Seoul, ZDNet Korea (지디넷코리아) reported.
Yoo worked as a vice president in Samsung's memory business from 2020 to 2025. His talk at the 9th Semiconductor Industry-Academia-Research Exchange Workshop, held at COEX, was titled "DRAM Technology for AI Systems."
Custom DRAM demand is growing with AI
Most DRAM today is standard memory, built to common specifications and sold to many buyers. Demand for memory built to one customer's needs is rising fast as AI systems grow, according to the report. Yoo expects that custom market to grow alongside the standard one.
"DRAM companies will have to make custom DRAM on top of their regular products, and they probably won't be able to handle all of it," Yoo said.
"The major companies will do the design and development for their big customers, but they won't support small and mid-sized buyers," he continued.
"Aiming at that niche, new businesses will appear, DRAM fabless companies that specialize in designing custom DRAM, and DRAM foundries that take on the job of making it," he added.
In other kinds of chips, that split already exists. A fabless company only designs chips, and a foundry makes them for other companies. DRAM has mostly been designed and made by the same companies.
He sees a turning point in how DRAM is built
Yoo said memory hasn't kept up with processors like CPUs and GPUs, and that's holding back how fast whole systems can run. Memory capacity in particular is falling behind the growth in AI model sizes.
Yoo said making DRAM cells smaller brings reliability problems. Repeatedly accessing one row can corrupt data in nearby rows, a problem called row hammer. To guard against it, chipmakers add circuits such as built-in error correction, and he said those circuits take up 6.25% or more of the chip's area.
Yoo pointed to 4F² DRAM, the smaller cell design that Samsung confirmed it's developing a day earlier, as one way forward.
"In 4F² DRAM, the transistor channel doesn't lie flat. It stands up vertically, and the capacitor is stacked right on top of that standing transistor," he explained.
"From here, we'll use 4F² DRAM, or DRAM that stacks cells 100 or 200 layers high like NAND, and that's where a big turning point will come," Yoo said.
He also expects chipmakers to build the memory cells and the circuits around them on separate wafers and then join them together, a process called wafer-to-wafer bonding, to make the best use of chip area.
The report doesn't name any company planning to become a DRAM fabless company or foundry, or say when one might appear.
Meanwhile, China's CXMT said earlier this month that it plans to launch DDR5 server memory using a 4F² design by the end of the year.
Quotes are translated from Korean.
